IEEE 683-1976-R2006 pdf free.IEEE Recommended Practice for Block Transfers in CAMAC Systems.
The basic CAMAC specification (see Ref [1]) defines a single CAMAC operation as the activity which occurs inresponse to a single CAMAC command.This activity may consist of the transfer of a single data word between aCAMAC module and computer memory or the changing of the status of a module [for example,F(26),F(24)] or returnof a value for Q as the result of a test made on the module, or any compatible set of the previously named activities.Ablock transfer is defined as a sequence of single CAMAC operations involving data which the user specifies by acommand said to be of a higher level than one which specifies a single CAMAC operation.The higher level commandcontains all the information required for the specification of the desired sequence of single CAMAC commands and isinterpreted by a channel which governs the activity on the CAMAC highway.Control information such as thereadiness of the computer to participate in a data transfer, the state of the CAMAC Q line and the state of certain LAMs(Look-at-Me’s) or special synchronizing signals must be made available to the channel.The use made of the controlinformation by the channel defines the block-transfer mode. If a module is to influence the sequence of operationswithin a block transfer, then it must have the features required by the algorithm.
A channel consists of an interface to theCAMACsystem as well as a means for selecting and executing the algorithmsof the implemented block-transfer modes. An algorithm may be implemented wholly in hardware or wholly insoftware or by a combination of hardware and software.The possibility of software implementation of any algorithmmeans that CAMAC block transfers can take place on a system which does not have the hardware (such as directmemory access) required to carry out “ computer”block transfers. Note that a module behaves in the same way whenit is accessed by a hardware algorithm as it does when accessed by conventional programmed computer input-output.Regardless of the method of channel implementation, the use of the channel results in reductions in both the CPU timerequired and in the programming effort through the use of pre-defined algorithms.
Many different block-transfer algorithms (or modes) may be defined, all of which are compatible with the CAMACspecifications. lIt is also possible to have a channel execute a sequence of CAMAC commands which does not involvethe transfer of data.An example of such a “Multiple Action”mode is discussed in the Appendix.Many algorithmsconvey control information by either Q or a LAM signal or both. The requirements placed on these signals by onealgorithm may conflict with those placed on them by another algorithm.Hence compatibility problems between modesand channels can occur. This is especially true if no restrictions are placed on the choice of a suitable block-transferalgorithm.However, experience with many different CAMAC systems and extensive analysis of the problem hasrevealed that a restricted number of block-transfer algorithms can satisfy nearly all needs. To encourage uniformity infuture designs of modules and controllers, certain algorithms are recommended to be used whenever possible, andsome additional algorithms are suggested for special applications that cannot practicably be implemented with therecommended algorithms. The possibility remains for a user to define other block-transfer algorithms to meet specialneeds.IEEE 683 pdf download.