IEC 60749-26-2018 pdf free download.Semiconductor devices – Mechanical and climatic test methods – Part 26: Electrostatic discharge (ESD) sensitivity testing – Human body model (HBM).
The purpose of this document is to establish a test method that will replicate HBM failures and provide reliable, repeatable HBM ESD test results from tester to tester, regardless of component type. Repeatable data will allow accurate classifications and comparisons of HBM ESD sensitivity levels.
ESD testing of semiconductor devices is selected from this test method, the machine model
(MM) test method (see IEC 60749-27) or other ESD test methods in the IEC 60749 series.
Unless otherwise specified, this test method is the one selected.
2 Normative references
The following documents are referred to in the text in such a way that some or all of their content constitutes requirements of this document. For dated references, only the edition cited applies. For undated references, the latest edition of the referenced document (including any amendments) applies.
There are no normative references in this document.
3 Terms and definitions
For the purposes of this document, the following terms and definitions apply.
ISO and IEC maintain terminological databases for use in standardization at the following addresses:
• IEC Electropedia: available at http:/!www.electropedia.org/
• ISO Online browsing platform: available at http://www.iso.org/obp
3.1 associated non-supply pin
non-supply pin (typically art I/O pin) associated with a supply pin group
Note I to entry A non-supply pin is considered to be associated with a supply pin group if either:
a) the current from the supply pin group (i.e., VDDIO) is required for the function of the electrical circuit(s) (110 driver) that connect(s) (high!low impedance) to that non-supply pin:
b) a parasitic path exists between non-supply and supply pin group (e.g., open-drain type non-supply pin to a VCC supply pin group that Connects to a nearby N.well guard ring).
3.2 cloned non-supply (110) pin
set of input, output or bidirectional pins using the same I/O cell and electrical schematic and sharing the same associated supply pin group(s) including ESD power clamp(s)
3.3 component
item such as a resistor, diode, transistor, integrated circuit or hybrid circuit
3.4 component failure
condition in which a tested component does not meet one or more specified static or dynamic data sheet parameters
3.5 coupled non-supply pin pair
two pins that have an intended direct current path (such as a pass gate or resistors, such as differential amplifier inputs, or low voltage differential signalling (LVDS) pins), including analogue and digital differential pairs and other special function pairs (e.g., D+ID-, XTALin/XTALout, RFin/RFout, TxPITxN, RxP/RxN, CCP_DP/CCN_DN. etc.)
3.6 data sheet parameters
static and dynamic component performance data supplied by the component manufacturer or supplier
3.7 withstand voltage
highest voltage level that does not cause device failure
Note 1 to entry: The device passes all tested lower voltages (see taelure window).
3.8 failure window
intermediate range of stress voltages that can induce failure in a particular device type, when the device type can pass some stress voltages both higher and lower than this range
Note 1 to entry: A component with a failure window can pass a 500 V test, tail a 1 000 V test and pass a 2 000 V test. The withstand voltage of such a device is 500 V.
3.9 human body model electrostatic discharge
HBM ESD
ESD event meeting the waveform criteria specified in this document, approximating the discharge from the fingertip of a typical human being to a grounded device.IEC 60749-26 pdf free download.